One technique for ameliorating the effects of high energy radiation is to provide hardening elements and/or redundancy in a Sequential State Element (SSE). Hardening elements either correct, or operate to allow the SSE to correct upsets, or prevent the SSE from transitioning erroneously, due to radiation strikes. These state machines are generally designed using an electronic computational system executing an Electronic Design Automation (EDA) program. The EDA program can be implemented by the electronic computational system so as to generate a physical representation of an in silico Integrated Circuit (IC), which can then be used in a foundry to create a physical IC. However, SSEs that utilize redundancy in order to correct soft errors require critical nodes be spaced appropriately. Otherwise, radiation strikes can cause soft errors that subvert the self-correction provided by the redundant SSEs. Unfortunately, EDA programs generally place components as close together as possible in order to create more spatially efficient designs. As such, automatic placement with EDA programs often results in IC layouts that do not provide critical node spacing. Therefore, humans have to determine where to put SSE layouts within these designs, which is extremely tedious and time consuming. Therefore, more efficient methods of creating radiation hardened designs with the placement tools provided by an EDA program are needed.